#if defined(MA_ARM) && (defined(__ARM_ARCH) && __ARM_ARCH >= 6) && !defined(MA_64BIT) /* <-- 64-bit inline assembly has not been tested, so disabling for now. */
/* Inline assembly optimized implementation for ARM. In my testing, GCC does not generate optimized code with __builtin_bswap32(). */
ma_uint32 r;
__asm__ __volatile__ (
#if defined(MA_64BIT)
"rev %w[out], %w[in]" : [out]"=r"(r) : [in]"r"(n) /* <-- This is untested. If someone in the community could test this, that would be appreciated! */
#else
"rev %[out], %[in]" : [out]"=r"(r) : [in]"r"(n)
#endif
);
return r;
#else
return __builtin_bswap32(n);
#endif
#else
#error "This compiler does not support the byte swap intrinsic."
#if defined(MA_ARM) && (defined(__ARM_ARCH) && __ARM_ARCH >= 6) && !defined(MA_64BIT) /* <-- 64-bit inline assembly has not been tested, so disabling for now. */
/* Inline assembly optimized implementation for ARM. In my testing, GCC does not generate optimized code with __builtin_bswap32(). */
ma_uint32r;
__asm____volatile__(
#if defined(MA_64BIT)
"rev %w[out], %w[in]":[out]"=r"(r):[in]"r"(n)/* <-- This is untested. If someone in the community could test this, that would be appreciated! */
#else
"rev %[out], %[in]":[out]"=r"(r):[in]"r"(n)
#endif
);
returnr;
#else
return__builtin_bswap32(n);
#endif
#else
#error "This compiler does not support the byte swap intrinsic."